CEG3155 hub, Laboratories
Laboratory 1 · CEG 3155 · uOttawa · Fall 2026

Light display controller

What the laboratory asks for, what the hardware does, and the order to do the work in. Ten minutes of reading.

1. The gist

The board has eight small LEDs in a row. You are building a circuit that lights one of them and moves the lit one along the row, one step per second, so a dot appears to travel across the display.

Two slide switches, LEFT and RIGHT, control it. Their four combinations:

  1. LEFT on. A dot travels from the right end of the row toward the left.
  2. RIGHT on. A dot travels from the left end toward the right.
  3. Both on. Two dots, one going each way. They pass through each other in the middle.
  4. Both off. The LEDs go dark. The dots stay where they were, and when you turn a switch back on they carry on from that position.

A third switch is the reset. It puts both dots back at their starting ends and clears the display.

That is the whole behaviour. The circuit is small. The work is in how you are required to design it.

2. What actually has to be done

The marks live here

The behaviour above is the easy part. The marks are for following a fixed design method, called ASM, and showing your working at every stage. Five stages, in this order, and each one reads its input off the one before it.

  1. Write the algorithm as pseudocode. Plain register transfers, one line each, with the branches written as if and else. No hardware named yet. The handout gives you a draft, so your job is to close its gaps and group it into blocks.
  2. Turn the pseudocode into an ASM chart. A flowchart with two shapes: a rectangle for a state, which takes exactly one clock step, and a diamond for a test, which takes no time at all. Every register the design needs is decided here.
  3. Draw the datapath. Read the hardware off the chart. Every register named in the chart becomes real storage, every value moved becomes a wire, anything transformed on the way gets a device in the path, and a register fed from more than one place gets a selector. This stage produces the list of control signal names.
  4. Redraw it as the detailed ASM chart. The same chart again, with every movement of data replaced by the names of the control signals that cause it.
  5. Design the control logic. Build the state machine that produces those signals, using the one flip flop per state method, which gives every state in your chart its own flip flop.

Only after all five do you write any VHDL. Simulating the result and running it on the board come after that, and neither is one of the five stages: they are how you check that stage 5 agrees with stage 1.

A report that shows working LEDs and skips the charts loses most of the marks.

3. The kit

Board
Digilent Nexys A7-100T, carrying a Xilinx Artix-7 FPGA
Software
Xilinx Vivado 2022.1
Runs on
Windows or Linux, x86 only. There is no Mac version
Disk needed
Around 90 GB once installed, and more during the install itself
Language
VHDL
Where
CBY B402, Wednesday evening
Team
Exactly two people

One of the two of you has to be able to run Vivado. If one partner is on a Mac, that partner cannot be the one who builds and programs the board. Settle this in the first ten minutes of the first session, because the download takes hours.

4. What is happening inside the circuit

Three storage registers, eight bits each.

The masks carry the dots. LMASK starts as 00000001, a single 1 at one end, and each step it moves that 1 one place along. RMASK starts as 10000000 and moves its 1 the other way.

DISPLAY copies whichever mask is active. With one switch on it takes that mask, with both on it takes the two combined, and with neither on it takes all zeros.

Two details decide whether your circuit works.

The dot has to come back. Move a single 1 along an eight bit register eight times and it falls off the end, leaving 00000000. The display would then stay dark for ever. So the registers rotate: the bit that leaves one end reappears at the other. The handout does not say this outright, so it is a decision you make and then write up.

Switching off must not erase the position. When both switches are off, DISPLAY is loaded with zeros, and LMASK and RMASK are left alone. A register with an enable input holds its value whenever the enable is low, so holding costs no extra hardware. You simply do not tell those two registers to load.

5. What the reset switch does

The reset forces every flip flop in the design to a known value: DISPLAY to all zeros, LMASK to 00000001, RMASK to 10000000. It is the only thing that ever puts the dots back to their starting positions. Turning the two travel switches off stops the dots and leaves them where they are.

Your demo starts by flipping reset on and then off again.

6. The rules that cost marks

7. How to approach it

Session one, together, on paper. Work through stages 1 to 3. Do not split this up, and do not open Vivado yet. Everything after it depends on these being right, and a TA is in the room to check them. Start the Vivado download on your partner's machine before you begin, so it runs while you work.

Then agree the list of signals between the two halves of the design. Write down the exact name and width of every wire that crosses from the control logic into the datapath, for example a two bit selector that chooses what DISPLAY loads. This list is the agreement that lets two people write code separately and have the pieces fit together afterwards.

Then split the building. One person takes the datapath: the three registers, the selector, the combining logic. The other takes the counter that produces the one per second pulse, plus the control logic. Each writes a small test for their own parts.

Session two, together. Wire the halves together, simulate the whole thing, then synthesise it and program the board.

Then the report. Whoever built a part writes that part of the report, and one of you reads the whole thing at the end so it sounds like one writer.

8. What goes in the report

From the handout's own list:

The problems section is worth planning for. The rotation decision in section 3 belongs there, and so does anything that behaved differently on the board than in simulation.

What this page is, and where it comes from

Read this if you have not opened the handout. It covers what the lab asks for, what the hardware does, and the order to do the work in.

Everything here is a reading of the Lab 1 handout on Brightspace, written out in plain language. The handout itself is the thing that is marked against, so open it before the report goes in. The design method the marks are for is in Lecture 4, and the language is in Lecture 3.

The handout and the lecture slides are the professor's, so no copy of either is kept here.